CS401 Finalterm Paper 1

FINALTERM EXAMINATION

Spring 2010

CS401- Computer Architecture and Assembly Language Programming

(Session - 3)
Time: 90 min
Marks: 58
Question No: 1 ( Marks: 1 ) - Please choose one
SP is associated with…………. By default
SS
DS
CS
ES
Question No: 2 ( Marks: 1 ) - Please choose one
Which bit of the attributes byte represents the red component of foreground color
5
4
3
2
Question No: 3 ( Marks: 1 ) - Please choose one
An 8 x 16 font is stored in ______________ bytes.
2
4
8
16
Question No: 4 ( Marks: 1 ) - Please choose one
In DOS input buffer, the number of characters actually read on return is stored in
___________ byte.
third
fourth
first
second
Question No: 5 ( Marks: 1 ) - Please choose one
Which of the following gives the more logical view of the storage medium
BIOS
DOS
Both
None
Question No: 6 ( Marks: 1 ) - Please choose one
In STOSW instruction, when DF is clear, SI is
Incremented by 1
Incremented by 2
Decremented by 1
www.allvupastpapers.blogspot.com
Decremented by 2
Question No: 7 ( Marks: 1 ) - Please choose one
Which of the following interrupts is Non maskable interrupt
INT 2
INT 3
INT 0
INT 1
Question No: 8 ( Marks: 1 ) - Please choose one
Which of the following IRQs is connected to serial port COM 2?
IRQ 0
IRQ 1
IRQ 2
IRQ 3
Question No: 9 ( Marks: 1 ) - Please choose one
The time interval between two timer ticks is ?
40ms
45ms
50ms
55ms
Question No: 10 ( Marks: 1 ) - Please choose one
The physical address of IDT( Interrupt Descriptor Table) is stored in _______
GDTR
IDTR
IVT
IDTT
Question No: 11 ( Marks: 1 ) - Please choose one
In NASM an imported symbol is declared with the ............................ while and
exported symbol is declared with the ............................
Global directive, External directive
External directive, Global directive
Home Directive, Foreign Directive
Foreign Directive, Home Directive
Question No: 12 ( Marks: 1 ) - Please choose one
In 68K processors there is a 32bit ...................... that holds the address of currently
executing instruction
Program counter
Stack pointer
Register
Stack
Question No: 13 ( Marks: 1 ) - Please choose one
www.allvupastpapers.blogspot.com
Single step interrupt is
Hardware interrupt
Like divide by zero interrupt
Like divide by 1 interrupt
Software interrupt
Question No: 14 ( Marks: 1 ) - Please choose one
Which of the following is NOT true about registers:
Their operation is very much like memory
Intermediate results may also be stored in registers
They are also called scratch pad ram
None of given options
Question No: 15 ( Marks: 1 ) - Please choose one
Types of jump are:
short, near
short, near, far
near, far
short, far
Question No: 16 ( Marks: 1 ) - Please choose one
MS DOS uses ____ display mode.
Character based
Graphics based
Numeric based
Console based
Question No: 17 ( Marks: 1 ) - Please choose one
Which of the following IRQs is derived by a timer device?
IRQ 0
IRQ 1
IRQ 2
IRQ 3
Question No: 18 ( Marks: 1 ) - Please choose one
In programmable interrupt controller, which of the following ports is referred as a
control port.
19
20
21
22
Question No: 19 ( Marks: 1 ) - Please choose one
INT 21 service 01H is used to read character from standard input with echo. It
returns the result in ______ register.
AL
BL
CL
BH
Question No: 20 ( Marks: 1 ) - Please choose one
www.allvupastpapers.blogspot.com
In 9pin DB 9, which pin number is assigned to DSR (DataSet Ready) ?
4
5
6
7
Question No: 21 ( Marks: 1 ) - Please choose one
In 9pin DB 9, which pin number is assigned to TD (Transmitted Data) ?
1
2
3
4
Question No: 22 ( Marks: 1 ) - Please choose one
In 9pin DB 9, Signal ground is assigned on pin number
4
5
6
3
Question No: 23 ( Marks: 1 ) - Please choose one
8088 is a ...........................
16 bit processor
32 bit processor
64 bit processor
128 bit processor
Question No: 24 ( Marks: 1 ) - Please choose one
The table index (TI) is set to _____ to access the GDT (Global Descriptor Table).
1
0
-1
-2
Question No: 25 ( Marks: 1 ) - Please choose one
VESA(Video Electronics Standards Association) organizes 16 color bits for every
pixel in
5:5:5 format
5:6:5 format
6:5:6 format
5:6:7 format
Question No: 26 ( Marks: 1 ) - Please choose one
Which flags are NOT used for mathematical operations ?
Carry, Interrupt and Trap flag.
Direction, Interrupt and Trap flag.
Direction, Overflow and Trap flag.
Direction, Interrupt and Sign flag.
Question No: 27 ( Marks: 2 )
Write instruction to allocate space for 32 PCBs.
www.allvupastpapers.blogspot.com
Ans:
multitasking kernel as a TSR
[org 0x0100]
jmp start
PCB layout:
ax,bx,cx,dx,si,di,bp,sp,ip,cs,ds,ss,es,flags,next,dummy
0, 2, 4, 6, 8,10,12,14,16,18,20,22,24, 26 , 28 , 30
Question No: 28 ( Marks: 2 )
Define short jump
Ans;
The jump is called a short jump, If the offset is stored in a single byte as in 75F2
with the opcode 75 and operand F2, the jump is called a short jump. F2 is added
to IP as a signed byte
Question No: 29 ( Marks: 2 )
INT 14 - SERIAL - READ CHARACTER FROM PORT uses which two 8bit registers to
return the results ?
Ans;
14 - SERIAL - READ CHARACTER FROM PORT uses these two 8bit registers to return
the results:
AH = line status
AL = received character if AH bit 7 clear
Question No: 30 ( Marks: 2 )
Which registers are uses as scratch when we call a function?
Ans:
Following registers are uses as scratch when we call a function
• EAX
• ECX
• EDX
Question No: 31 ( Marks: 3 )
VESA service "INT 10 – VESA – Get SuperVGA Information" uses which registers to
return the result?
To return the result, "INT 10 – VESA – Get SuperVGA Information” uses:
Return:
AL = 4Fh if function supported
AH = status
Question No: 32 ( Marks: 3 )
Define the protected mode.
www.allvupastpapers.blogspot.com
When the processor switches into 32bit mode it is called protected mode. It can be
accessed by turning on least significant bit of a register called CR0
(Control Register 0) and the processor switches into 32bit mode.
All registers in 386 have been extended to 32bits. The new names are
EAX,
EBX,
ECX,
EDX,
ESI,
EDI,
ESP,
EBP,
EIP, and
EFLAGS.
The original names refer to the lower 16bits of these registers. A 32bit address
register can access upto 4GB of memory so memory access has increased a lot.
Question No: 33 ( Marks: 3 )
Describe briefly INT 3 functionality.
The functionality of INT 3 is this , its Debug Interrupt. The special thing about this
interrupt is that it has a single byte opcode and not a two byte combination where
the second byte tells the interrupt number which allows it to replace any instruction
what soever. It is also used by the debugger.
Question No: 34 ( Marks: 5 )
Read the passage carefully and choose proper word for each blank space
from the list given below .
In descriptors the 32bit base is scattered into different places because of
compatibility reasons. The limit is stored in 20 bits but the ...............defines that the
limit is in terms of bytes of 4K pages therefore a maximum of 4GB size is possible.
The ................. must be set to signal that this segment is present in memory. DPL
is the descriptor privilege level again related to the protection levels in 386.
.................. defines that this segment is to execute code is 16bit mode or 32bit
mode. .................. is conforming bit that we will not be using. ..................signals
that the segment is readable. A bit is automatically set whenever the
segment is accessed.
(A bit, C bit, G bit, D bit, P bit , R bit, B bit)
SOLUTION:
In descriptors the 32bit base is scattered into different places because of
compatibility reasons. The limit is stored in 20 bits but the .......G bit........defines
that the limit is in terms of bytes of 4K pages therefore a maximum of 4GB size is
possible. The .......P bit.......... must be set to signal that this segment is present in
memory. DPL is the descriptor privilege level again related to the protection levels
in 386. ........D bit.......... defines that this segment is to execute code is 16bit mode
or 32bit mode. .........C......... is conforming bit that we will not be using. .......R
bit...........signals that the segment is readable. A bit is automatically set whenever
the segment is accessed.
www.allvupastpapers.blogspot.com
Question No: 35 ( Marks: 5 )
Answer the following:
§ What is a device driver?
Ans:
These are operating system extensions which become part of the operating system
and extend its services to new devices. Device drivers in
DOS are very simple. They just have their services exposed through the file
system interface.
Device driver file starts with a header containing a link to the next driver in the first
four bytes followed by a device attribute word. The most important bit in the device
attribute word is bit 15 which dictates if it is a character device or a block device.
If the bit is zero the device is a character device and otherwise a block device.
Next word in the header is the offset of a strategy routine, and then is the offset of
the interrupt routine and then in one byte, the number of units supported is stored.
This information is padded with seven zeroes.
• Strategy routine is called whenever the device is needed
• it is passed a request header. Request header stores the unit requested,
the command
• code, space for return value and buffer pointers etc. Important command
codes include
1. 0 to initialize,
2. 1 to check media,
3. 2 to build a BIOS parameter block,
4. 4 and 8 for read and write respectively.
For every command the first 13 bytes of request header are same.
§ Why are device drivers necessary, given that the BIOS already has code
that communicates with the computer's hardware?
Ans:
These are used for the reason of fast programming execution. device driver takes
some RAM and expresses it as a secondary storage device to the operating
system. Therefore a new drive is added and that can be browsed to, filed copied to
and from just like ordinary drives expect that this drive is very fast as it is located in
the RAM. This program cannot be directly executed since it is not a user program.
This must be loaded by adding the line “device=filename.sys” in the
“config.sys” file in the root directory.
Question No: 36 ( Marks: 5 )
Write the code of “break point interrupt routine”.
Breakpoint interrupts service routine :
debugISR: push bp
mov bp, sp ; …………….to read cs, ip and flags
push ax
push bx
push cx
push dx
push si
push di
www.allvupastpapers.blogspot.com
push ds
push es
sti ;…………………….. waiting for keyboard interrupt
push cs
pop ds ;…………………… initialize ds to data segment
mov ax, [bp+4]
mov es, ax ; ………………….load interrupted segment in es
dec word [bp+2] ; ……………….decrement the return address
mov di, [bp+2] ;………………… read the return address in di
mov word [opcodepos], di ;…………. remember the return position
mov al, [opcode] ; …………..load the original opcode
mov [es:di], al ;………….. restore original opcode there
mov byte [flag], 0 ; …………set flag to wait for key
call clrscr ;……………. clear the screen
mov si, 6 ; …………..first register is at bp+6
mov cx, 12 ;………… total 12 registers to print
mov ax, 0 ; …………..start from row 0
mov bx, 5 ; ………….print at column 5
push ax ; ………………..row number
push bx ;………………. column number
mov dx, [bp+si]
push dx ;………………. number to be printed
call printnum ;…………….. print the number
sub si, 2 ; ……………….point to next register
inc ax ; ………………..next row number
loop l3 ; ……………….repeat for the 12 registers
mov ax, 0 ; ………………..start from row 0
mov bx, 0 ; ………………..start from column 0
mov cx, 12 ; …………………..total 12 register names
mov si, 4 ;……………………. each name length is 4 chars
mov dx, names ; …………………..offset of first name in dx
push ax ;………………………. row number
push bx ; ………………………column number
push dx ; ……………………….offset of string
push si ; ………………………….length of string
call printstr ; ………………………….print the string
add dx, 4 ;………………………….. point to start of next string
inc ax ; ……………………………new row number
loop l1 ;…………………………….. repeat for 12 register names
or word [bp+6], 0x0100 ; ……………………set TF in flags image on stack
keywait: cmp byte [flag], 0 ;……………………. has a key been pressed
je keywait ; ………………….. no, check again
pop es
pop ds
pop di
pop si
pop dx
pop cx
www.allvupastpapers.blogspot.com
pop bx
pop ax
pop bp
iret
start: xor ax, ax
mov es, ax ; ……………………point es to IVT base
mov word [es:1*4], trapisr ;…………………. store offset at n*4
mov [es:1*4+2], cs ; …………………...store segment at n*4+2
mov word [es:3*4], …………………..debugisr ; store offset at n*4
mov [es:3*4+2], cs ; …………………..store segment at n*4+2
cli ; ………………….disable interrupts
mov word [es:9*4], kbisr ; ………………….store offset at n*4
mov [es:9*4+2], cs ; ……………………...store segment at n*4+2
sti ; ………………………enable interrupts

By : ADEEL ABBAS 

www.allvupastpapers.blogspot.com 

AdeelAbbasbk@gmail.com