::: vuaskari.com ::: CS401 Quiz No.1 Dated 08th November 2012

Quiz No.1 CS401 Assembly Language

Dated 08-11-2012

 

In direct addressing the memory address given in the instruction is

Fixed
Variable
Register
Empty

 

Execute in every condition whether true or false 
If the condition is true 
If the condition is false 
None of the given

 

 

This jump is taken if the last arithmetic operation produced a number in its destination that has even parity , Which jump is taken 
Select correct option: 

JP 
JPE 
JNP 
both JP and JPE

 

This jump is taken if the last arithmetic operation produced a number in its destination that has even parity , Which jump is taken 
Select correct option: 

JP 
JPE 
JNP 
both JP and JPE

 

The process through which the segment register can be explicitly specified is known as 
Select correct option: 
Segment Addressing 
Segment Override Prefix 
Segment Indexing 
None of the above

 

 The other directive is "define word" or "dw" with the same syntax as "db" but reserving a whole word of __ bits instead of a byte. 
Select correct option: 

32 
8 
16 
64

 

Which of the following is not a valid instruction in assembly language? 
Select correct option: 

MOV AX, 55 
MOV AX, BX 
MOV CS, 0xb800 
MOV BX, AX

 

Constant is never use as a 
Select correct option: 

Source 
Destination 
Both as source and destination 
None of the given

 

we can not add two base register i.e. (bx+bp) or cant use in an instruction 
Select correct option: 

True 
False

 

which type of rotation it is "The carry flag is inserted from the left, every bit moves one position to the right, and the right most bit is dropped in the carry flag. " 
Select correct option: 

RCR 
ROL 
RCL 
ROR

 

The simplest form of addressing, in which the operand value is present in instruction is 
Select correct option: 
Direct Addressing 
Indirect Addressing 
Immediate Addressing 
None of them

 

mov [bx+si], ax is an example of Indexed Register Indirect. 
Select correct option: 

True 
False

 

mov [1234],ax is an example of 
Select correct option: 
Direct addressing 
Base register indirect 
Base+index 
None of the given

 

This JCXZ jump is taken whenever counter resets. 
Select correct option: 

Yes 
No

 

 __ jump is not position relative but is absolute 
Select correct option: 

Near 
Short 
Far 
None of the above

 

Size Mismatch Error is a syntax error 
Select correct option: 
False 
True

 

The effective address will be either a main memory address or a register. 
Select correct option: 
True 
False

 

we can not Subrtace index register from the base register( bx-si )in assemlby language 
Select correct option: 

True 
False

ANY ONE ELSE /

 

All the addressing mechanisms in iAPX88 return a number called ___________ address.
Select correct option:

EFFICTIVE address

physical address

direct

 

Which one of the following is a illegal instruction
Select correct option:

MOV AX,BX

MOV AX,65

MOV ax,[bx+bp]

none

 

we can not Subrtace index register from the base register( bx-si )in assemlby language

true

false

The effective address will be either a main memory address or a register.

true

false

CX register mostly use a

flag register

destination register

baase register

COUNTER

 

The FLAG register in Intel x86 microprocessors that contains the current state of the processor
Select correct option:

True

false

 

The Jump command that doesn't depends on FLAG register is
Select correct option:

 JCXZ

  JO

  JINE

  JP

 when a 32 bit number is divided by a 16 bit number, the remainder is of

4bit

8bit

32bit

SHL and SAL are same

true

false

 

The simplest form of addressing, in which the operand value is present in instruction is
Select correct option:

direct addressing

indirect addressing

 

The simplest form of addressing, in which the operand value is present in instruction is 
Select correct option: 
Direct Addressing 
Indirect Addressing 
Immediate Addressing 
None of them

 

Register to Register Operation is not allowed 
Select correct option: 

True 
False

 

we can not add two base register i.e. (bx+bp) or cant use in an instruction 
Select correct option: 

True 
False

 

The jump is taken if the last arithmetic operation changed the sign unexpectedly. 
Select correct option: 

JO 
JNO 
JNZ 
JZ

 

unconditional jump can be 
Select correct option: 
near 
short 
far 
all of the given

 

 

SI or DI is used we name the method. 
Select correct option: 

Based Addressing 
Indexed Addressing 
Stack Addressing 
None of the above

 

Which of the following is not a valid instruction in assembly language?  
Select correct option: 

MOV AX, 55 
MOV AX, BX 
MOV CS, 0xb800 
MOV BX, AX

 

This jump is taken if the last arithmetic operation produced a number in its destination that has even parity , Which jump is taken 
Select correct option: 

JP 
JPE 
JNP 
both JP and JPE

 

BP by default associated with
Select correct option:
CS
IP
SS
SP

 

Question # 1 of 10 ( Start time: 04:12:37 PM ) Total Marks: 1
BP by default associated with
Select correct option:
CS
IP
SS
SP

 

 

 

 

 

 In a virtual memory system, the effective address is a main memory address.
Select correct option:
True
False

 

Which type of Rotation it is "Every bit moves one position to the right and the bit dropped from the right is inserted at the eft. This bit is also copied into the carry flag."
Select correct option:
ROL
RCR
RCL
None of the given

 

The most basic difference between Conditional and Unconditional jumping is
Select correct option:
arithmetic operations
consideration of flags
address
none of the above

 

In direct addressing the memory address given in the instruction is
Select correct option:
Fixed
Variable
Register
Empty

 

__ jump is not position relative but is absolute
Select correct option:
Near
Short
Far
None of the above

 

The simplest form of addressing, in which the operand value is present in instruction is
Select correct option:
Direct Addressing
Indirect Addressing
Immediate Addressing
None of them

 

 

 

By default CS is associated with
Select correct option:
SS
BP
CX
IP

 

The stack pointer contains the address of the word that is currently on__:
Select correct option:
Top of the stack
Down of the stack
Top and Down both
None of the above

The stack pointer contains the address of the word that is currently on__:
Select correct option:
Top of the stack
Down of the stack
Top and Down both
None of the above

 Quiz: NEXT

 

Constant is never use as a
Select correct option:
Source
Destination
Both as source and destination
None of the given

 

Register to memory operation is not allowed
Select correct option:
True
False

Register to memory operation is not allowed
Select correct option:
True
False

 

 

 

 

The Jump command that doesnot depends on FLAG register is
Select correct option:
JCXZ
JO
JNE
JP

 

__ jump is not position relative but is absolute
Select correct option:
Near
Short
Far
None of the above

  far

 

Memory to Memory operation is allowed
Select correct option:
True
False

 

Which register holds the item that is to be written into the stack or read out of the stack:
Select correct option:
SP
IP
BX
DX

  SP

  ?

 

The process through which the segment register can be explicitly specified is known as
Select correct option:
Segment Addressing
Segment Override Prefix
Segment Indexing
None of the above

 

In JZ jump is not taken if the last arithmetic operation produced a zero in its destination.
Select correct option:
True
False

 

we can not add two base register i.e. (bx+bp) or cant use in an instruction
Select correct option:
True
False

 

Physical address calculation depends on
Select correct option:
Base address
Effective address
Offset Address
None of the above

 

The other directive is "define word" or "dw" with the same syntax as "db" but reserving a whole word of __ bits instead of a byte.

Select correct option:
32
8
16
64

SI or DI is used we name the method. 
Select correct option: 
Based Addressing 
Indexed Addressing 
Stack Addressing

None of the above

FLAG register in Intel x86 microprocessors that contains the current state of the processor 
Select correct option: 

True 
False

 

The addressing method that can be used to access a two dimensional array is. 
Select correct option: 

Base + Index + Offset addressing 
Base + Index addressing

we can not add two base register i.e. (bx+bp) or cant use in an instruction 
Select correct option: 

True 
False

 

 

Which type of Rotation it is "Every bit moves one position to the right and the bit dropped from the right is inserted at the eft. This bit is also copied into the carry flag." 
Select correct option: 

ROL 
RCR 
RCL 
None of the given

 

Constant is never use as a 
Select correct option: 

Source 
Destination 
Both as source and destination 
None of the given

 

Bydefault CS is associated with 
Select correct option: 

SS 
BP 
CX 
IP

 

BX is a register in which intermediate arithmetic and logic results are stored. 
Select correct option: 

True 
False

 

The process through which the segment register can be explicitly specified is known as 
Select correct option: 

Segment Addressing 
Segment Override Prefix 
Segment Indexing 
None of the above

 

SHL and SAL are same 
Select correct option: 

True 
False

  which type of rotation it is "The carry flag is inserted from the left, every bit moves one position to the right, and the right most bit is dropped in the carry flag. "

RCR
RQL

RDL

RLL

 

MOV AL,BX is a type of ___ error.

syntax

size mismatch error

size mismatch

 

All the addressing mechanisms in iAPX88 return a number called ___________ address

Effective address

Physical address

 

we can not add two base register i.e. (bx+bp) or cant use in an instruction

True

False

 

BX is a register in which intermediate arithmetic and logic results are stored.

True

False

 

 

mov [1234],ax is an example of

Direct addressing
Base register indirect

Base+index

direct addressing

In JA jump is not taken after a CMP if the unsigned destination is larger than the unsigned source.

True

False

 

This jump is taken if the last arithmetic operation produced a number in its destination that has even parity , Which jump is taken

  JP
JPE
JNP

None

 

 

 

 

Mechanism used to drop carry for making the calculated address valid is known as: 
Select correct option: 

Carry Overload 
Overflow 
Address Wraparound 
None of the above 

we can not Subtracted index register from the base register( bx-si )in assembly language 
Select correct option: 

True 
False 

Physical address calculation depends on 
Select correct option: 

Base address 
Effective address 
Offset Address 
None of the above 

Simple CMP instruction uses _____ operation 
Select correct option: 

Addition 
Division 
Subtraction 
Multiplicaion 

SS is bydefult associated with 
Select correct option: 

BP 
IP 
SP 
BP 

When a 32 bit number is divided by a 16 bit number, the remainder is of 
Select correct option: 

4 bits 
8 bits 
16 bits 
32 bits 

Memory to Memory operation is allowed 
Select correct option: 
True 
False 


SS is bydefult associated with
BP
IP
SP
BP

Register to constant data movement is allowed?
No
Yes

The first 16-bit processor produced by "Intel" was 8085

True

False

 

 

The first 16-bit processor produced by "Intel" was 8085

True

False

 

Instruction Pointer holds the address of the

Previous instruction to be executed

Current instruction

Next instruction to be executed

None of the given

 

 

Group of bits processor uses to inform memory which element to read/write is
collectively known as
Select correct option:
Control bus
Data bus
Address bus
RAM

 

Register are storage cell
Select correct option:
Outside the processor
Both inside and outside the processor
Inside the processor
None of the given

 

The basic function of register is to
Select correct option:
Hold the operand
Hold the operator
Hold both the operator and operand
None of the given

 

Assembly languague is not a low level language.
Select correct option:
True
False

 

 

90 is the op-code of

Do nothing

Add

Subtract

Multiplication

 

he space where all the registers of a task are stored is called the
control block
process control block 
stack
memory 

The number of pins in a parallel port connector are?
20
25
15
10

 

 

 

In a free market economy, resources are allocated on the basis of:

 

vote taken by consumer

a central planning authority

consumers preferences

the level of profit of firm

 

Accounts office of Z&X corporations has paid Rs.250000 on account of profit in the month of August 2011. Which of the following the accounts office has paid for?

Labour

capital

land

entrepreneur

 

If the quantity demanded of mangoes exceeds the quantity supplied of mangoes:  

there is a surplus of mangoes

market force will cause the price to fall

market force will cause the price to rise 

the market is in equilibrium

 

4The process by which we limit the supply or amount of some economic factor which is scarcely available is called:

Rationing 

Budling

price floor

price ceiling

 

That resources are fully employed in producing particulars goods and services

the level of production that will cause both unemployment and inflation

Which of the following factors would cause leftward shift in supply curve for bicycles?

Decrease in wages

increase in price of input 

Decrease in price of input

use the latest technology in production of bicycle

 

Measurement of elasticites is made in percentage terms because:

it is easy to calculate

the resulting measurement is unit free

it give a more accurate answer

the answer is always negative way

 

 

 

8 Suppose quantity demanded of chicken increases by 5 percent in response to 2 percent increase in price of beef. The cross-price elasticity of demand for chicken with respect to price of beef is:

+2.5 

-2.5

+.25

-.25

 

Normally the shape of production possibility frontier is:

positive

convex

lenear

concave

 

If desk lamps and bulbs are complementary goods, a fall in price of desk lamps will shift the demand curve for:

bulbs to the right

bulbs to the right

Desk lamps to the right

desk lamps to the left

 

mov [si+300], ax is an example of Indexed Register Indirect + Offset

Select correct option:

True

False

 

 

The iAPX88 processor supports _____________modes of memory access.

Select correct option:

 6

 7

 8

 9

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