::: vuaskari.com ::: Fwd: 501

mine 501's paper held at 19may
i) difference between latency and throughput 2marks page 203
ii)which register holds the instruction that is being executed? 2marks IR(instruction register)
iii)structural RTL out ra,c2 3marks page 164
iv)how compilers can detect and correct hazards? why is not preferable?3marks page 215
v)2ways to increase no. of instructions executed in giveb time? 5marks page 219
vi)structural RTL for shiftr ra,rb,c1? 5marks

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